1. Field of the Invention
The present invention relates to a noise detection circuit for monitoring signals input to a specific circuit such as a peripheral device installed in a microcomputer or the like, which requires input signals of a constant level for a predetermined period of time, so as to detect noise in the input signals.
2. Description of the Prior Art
FIG. 12 is a schematic diagram showing a conventional noise detection circuit, and particularly showing here the configuration of a noise detection circuit for removing noise in the signals input to a peripheral device installed in a microcomputer.
In the figure, reference numeral 1 denotes a peripheral device installed in a microcomputer, numeral 2 denotes a signal input terminal through which signals are input to the peripheral device 1, numeral 3 denotes a delay circuit composed of even-numbered pieces of NOT circuits, and reference numeral 4 denotes a two-input AND circuit where an input signal fed from the signal input terminal 2 and an output from the delay circuit 3 are ANDed. It is to be noted that the noise removing circuit shown here is an example of a circuit for removing noise which is generated at the rise of an input signal.
The operation of the conventional noise detection circuit is explained as in the following.
Here, FIGS. 13A, 13B and 13C are exemplary views each showing the waveform of each circuit element of the noise removing circuit shown in FIG. 12. FIG. 13A shows a noise removing operation performed by use of this noise removing circuit. FIG. 13B shows a noise removing operation in a case in which the time period delayed by the delay circuit 3 is relatively long, whereas FIG. 13C shows the operation in a case in which the noise pulses are consecutively generated.
Assuming that the pulse input through the signal input terminal 2 is a noise whose pulse width is shorter than the time interval delayed by the delay circuit 3, the signal pulse input through the signal input terminal 2 returns, as shown rather in the left side of FIG. 13A, to the low level (hereinafter may be referred to either as the "L"level, or just as "L") before the output from the delay circuit 3 becomes high level (hereinafter may be referred to either as the "H" level, or just as "H"). Consequently, the two signals input to the 2-input AND circuit 4 do not become "H" level simultaneously, but stay at the "L" level. In other words, the signal whose pulse width is shorter than the time interval delayed by the delay circuit 3 is removed as a noise, and thus not transmitted to the peripheral device 1.
On the other hand, assuming that the signal input through the signal input terminal 2 is a noise pulse whose pulse width is longer than the time interval delayed by the delay circuit 3, the level of the output from the delay circuit 3b then becomes also "H" as shown rather in the right side of FIG. 13A, during the period in which the signal pulse input through the signal input terminal 2 is still in the "H" level. Consequently, the two signals input to the 2-input AND circuit 4 also become "H" level. In other words, the signal whose pulse width is longer than the time interval delayed by the delay circuit 3 cannot be removed, and thus it is transmitted to the peripheral device 1 as a noise. In this way, the width of the noise can be determined depending on the time interval delayed by the delay circuit 3 in this noise removing circuit above.
However, if the delayed time interval is set too long for the purpose of removing the noise of a long pulse width, as shown in FIG. 13B, even when a correct waveform is input, the input signal delayed for the time interval determined by the delay circuit 3 is transmitted from the AND circuit 4 to the peripheral device 1, resulting that the timing set up for a signal input to the peripheral device 1 is also delayed.
Further, even when the pulse width of the noise is shorter than the time interval delayed by the delay circuit 3, there will be a problem if the pulses are consecutively input, it causes a problem. For example, as shown in FIG. 13C, in a case in which the noise of the former pulse delayed by the delay circuit 3 is output to one of the two inputs of the 2-input AND circuit 4, if the latter noise pulse which is not delayed is input to the other, the output from the 2-input AND circuit 4 becomes "H" in their superimposed range. Hence, the output from the 2-input AND circuit 4 is recognized as a rising signal in the peripheral device 1 that performs an edge sensing operation with respect to input signals, and accordingly the peripheral device 1 will possibly perform an unexpected erroneous operation.
Similar or related arts to the conventional noise detection devices as mentioned above are disclosed in such documents as; Japanese Patent Application Laid-Open Nos. 51-14144, 63-284923, 2-88983, 6-132792, 5-276057, and No. 61-107811.
Since the conventional noise detection circuit is configured as mentioned above, there are such drawbacks that the detectable noise width is varied in accordance with a time interval delayed by the delay circuit 3, and that the consecutively generated noise pulses cannot be detected properly.